Yoshimi Asada
According to our database1,
Yoshimi Asada
authored at least 2 papers
between 1998 and 1999.
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Bibliography
1999
A 2.5-GFLOPS, 6.5 million polygons per second, four-way VLIW geometry processor with SIMD instructions and a software bypass mechanism.
IEEE J. Solid State Circuits, 1999
1998
A 1.2-W, 2.16-GOPS/720-MFLOPS embedded superscalar microprocessor for multimedia applications.
IEEE J. Solid State Circuits, 1998