Yoshiki Tsujihashi

According to our database1, Yoshiki Tsujihashi authored at least 6 papers between 1994 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A Cost Effective Test Screening Circuit for embedded SRAM with Resume Standby on 110-nm SoC/MCU.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2015
A cost effective test screening method on 40-nm 4-Mb embedded SRAM for low-power MCU.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2014
40nm Ultra-low leakage SRAM at 170 deg.C operation for embedded flash MCU.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

40 nm Dual-port and two-port SRAMs for automotive MCU applications under the wide temperature range of -40 to 170°C with test screening against write disturb issues.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

1998
A low power SRAM using auto-backgate-controlled MT-CMOS.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

1994
A high-density data-path generator with stretchable cells.
IEEE J. Solid State Circuits, January, 1994


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