Yoshikazu Ohno

According to our database1, Yoshikazu Ohno authored at least 2 papers between 1992 and 1994.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

1992
1993
1994
0
1
2
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1994
An experimental 256-Mb DRAM with boosted sense-ground scheme.
IEEE J. Solid State Circuits, November, 1994

1992
A 34-ns 16-Mb DRAM with controllable voltage down-converter.
IEEE J. Solid State Circuits, July, 1992


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