Yoshihiro Ichinomiya

According to our database1, Yoshihiro Ichinomiya authored at least 12 papers between 2009 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2012
Fault-Injection Analysis to Estimate SEU Failure in Time by Using Frame-Based Partial Reconfiguration.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012

A Bitstream Relocation Technique to Improve Flexibility of Partial Reconfiguration.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2012

Fault Recovery Technique for TMR Softcore Processor System Using Partial Reconfiguration.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2012

Accelerated evaluation of SEU failure-in-time using frame-based partial reconfiguration.
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Designing Flexible Reconfigurable Regions to Relocate Partial Bitstreams.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011
Improving the Soft-error Tolerability of a Soft-core Processor on.
J. Next Gener. Inf. Technol., 2011

A Novel Soft Error Detection and Correction Circuit for Embedded Reconfigurable Systems.
IEEE Embed. Syst. Lett., 2011

2010
A robust reconfigurable logic device based on less configuration memory logic cell.
Proceedings of the International Conference on Field-Programmable Technology, 2010

COGRE: A Configuration Memory Reduced Reconfigurable Logic Cell Architecture for Area Minimization.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Improving the Robustness of a Softcore Processor against SEUs by Using TMR and Partial Reconfiguration.
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

2009
A novel states recovery technique for the TMR softcore processor.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Memory Sharing Approach for TMR Softcore Processor.
Proceedings of the Reconfigurable Computing: Architectures, 2009


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