Yoshihiro Hayashi

According to our database, Yoshihiro Hayashi authored at least 25 papers between 1984 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2024

Scaling Law of Sim2Real Transfer Learning in Expanding Computational Materials Databases for Real-World Predictions.

Shunya Minami, Yoshihiro Hayashi, Stephen Wu, Kenji Fukumizu, Hiroki Sugisawa, Masashi Ishii, Isao Kuwajima, Kazuya Shiratori, Ryo Yoshida

CoRR, 2024

Advancing Extrapolative Predictions of Material Properties through Learning to Learn.

Kohei Noda, Araki Wakiuchi, Yoshihiro Hayashi, Ryo Yoshida

CoRR, 2024

2023

SMiPoly: Generation of a Synthesizable Polymer Virtual Library Using Rule-Based Polymerization Reactions.

Mitsuru Ohno, Yoshihiro Hayashi, Qi Zhang, Yu Kaneko, Ryo Yoshida

J. Chem. Inf. Model., September, 2023

Transfer Learning with Affine Model Transformation.

Shunya Minami, Kenji Fukumizu, Yoshihiro Hayashi, Ryo Yoshida

Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023

2022

T/R Switch Composed of Three HV-MOSFETs With 12.1-μW Consumption That Enables Per-Channel Self-Loopback AC Tests and -18.1-dB Switching Noise Suppression for 3-D Ultrasound Imaging With 3072-Ch Transceiver.

Shinya Kajiyama, Yutaka Igarashi, Toru Yazaki, Yusaku Katsube, Takuma Nishimoto, Tatsuo Nakagawa, Yohei Nakamura, Yoshihiro Hayashi, Takuya Kaneko, Hiroki Ishikuro, Taizo Yamawaki

IEEE Trans. Very Large Scale Integr. Syst., 2022

2020

Acceleration of Liquid-Crystalline Phase Transition Simulations Using Selectively Scaled and Returned Molecular Dynamics.

Ryoma Sasaki, Yoshihiro Hayashi, Susumu Kawauchi

J. Chem. Inf. Model., 2020

Incremental Hierarchical Clustering for Data Insertion and Its Evaluation.

Kakeru Narita, Teruhisa Hochin, Yoshihiro Hayashi, Hiroki Nomiya

Int. J. Softw. Innov., 2020

2019

Single-Chip 3072-Element-Channel Transceiver/128-Subarray-Channel 2-D Array IC With Analog RX and All-Digital TX Beamformer for Echocardiography.

Yutaka Igarashi, Shinya Kajiyama, Yusaku Katsube, Takuma Nishimoto, Tatsuo Nakagawa, Yasuyuki Okuma, Yohei Nakamura, Takahide Terada, Taizo Yamawaki, Toru Yazaki, Yoshihiro Hayashi, Kazuhiro Amino, Takuya Kaneko, Hiroki Tanaka

IEEE J. Solid State Circuits, 2019

Improvement of Incremental Hierarchical Clustering Algorithm by Re-insertion.

Kakeru Narita, Teruhisa Hochin, Yoshihiro Hayashi, Hiroki Nomiya

Proceedings of the Computational Science/Intelligence and Applied Informatics, 2019

T/R-Switch Composed of 3 High-Voltage MOSFETs with 12.1 µW Consumption that can Perform Per-channel TX to RX Self-Loopback AC Tests for 3D Ultrasound Imaging with 3072-channel Transceiver.

Shinya Kajiyama, Yutaka Igarashi, Toru Yazaki, Yusaku Katsube, Takuma Nishimoto, Tatsuo Nakagawa, Yohei Nakamura, Yoshihiro Hayashi, Taizo Yamawaki

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2017

27.6 Single-chip 3072ch 2D array IC with RX analog and all-digital TX beamformer for 3D ultrasound imaging.

Yusaku Katsube, Shinya Kajiyama, Takuma Nishimoto, Tatsuo Nakagawa, Yasuyuki Okuma, Yohei Nakamura, Takahide Terada, Yutaka Igarashi, Taizo Yamawaki, Toru Yazaki, Yoshihiro Hayashi, Kazuhiro Amino, Takuya Kaneko, Hiroki Tanaka

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2015

Low-power embedded ReRAM technology for IoT applications.

Makoto Ueki, K. Takeuchi, T. Yamamoto, Akira Tanabe, N. Ikarashi, M. Saitoh, T. Nagumo, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, S. Saito, Y. Yabe, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi

Proceedings of the Symposium on VLSI Circuits, 2015

13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network.

Tomohiro Sano, Masakazu Mizokami, Hiroaki Matsui, Keisuke Ueda, Kenichi Shibata, Kenji Toyota, Tatsuhito Saitou, Hisayasu Sato, Koichi Yahagi, Yoshihiro Hayashi

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2012

A 27% Active-Power-Reduced 40-nm CMOS Multimedia SoC With Adaptive Voltage Scaling Using Distributed Universal Delay Lines.

Yoshifumi Ikenaga, Masahiro Nomura, Shuji Suenaga, Hideo Sonohara, Yoshitaka Horikoshi, Toshiyuki Saito, Yukio Ohdaira, Yoichiro Nishio, Tomohiro Iwashita, Miyuki Satou, Koji Nishida, Koichi Nose, Koichiro Noguchi, Yoshihiro Hayashi, Masayuki Mizuno

IEEE J. Solid State Circuits, 2012

2011

A Novel Variable Inductor Using a Bridge Circuit and Its Application to a 5-20 GHz Tunable LC-VCO.

Akira Tanabe, Ken'ichiro Hijioka, Hirokazu Nagase, Yoshihiro Hayashi

IEEE J. Solid State Circuits, 2011

Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs.

Koichi Takeda, Toshio Saito, Shinobu Asayama, Yoshiharu Aimoto, Hiroyuki Kobatake, Shinya Ito, Toshifumi Takahashi, Masahiro Nomura, Kiyoshi Takeuchi, Yoshihiro Hayashi

IEEE J. Solid State Circuits, 2011

2009

Visualizing Method based on Item Sales Records and its Experimentation.

Yoshihiro Hayashi, Hiroshi Tsuji, Ryosuke Saga

Proceedings of the IEEE International Conference on Systems, 2009

2008

Hotel recommender system based on user's preference transition.

Ryosuke Saga, Yoshihiro Hayashi, Hiroshi Tsuji

Proceedings of the IEEE International Conference on Systems, 2008

2007

Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Generation.

Noriaki Oda, Hironori Imura, Naoyoshi Kawahara, Masayoshi Tagami, Hiroyuki Kunishima, Shuji Sone, Sadayuki Ohnishi, Kenta Yamada, Yumi Kakuhara, Makoto Sekine, Yoshihiro Hayashi, Kazuyoshi Ueno

IEICE Trans. Electron., 2007

2006

A Novel Monitoring Method of RF Characteristics Variations for Sub-0.1μm MOSFETs with Precise Gate-resistance Model.

Akira Tanabe, Ken'ichiro Hijioka, Yoshihiro Hayashi

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

1998

An embedded FeRAM macro cell for a smart card microcontroller.

Tohru Miwa, Junichi Yamada, Yuji Okamoto, Hiroki Koike, Hideo Toyoshiina, Hiromitsu Hada, Yoshihiro Hayashi, Hiroaki Oliizaki, Yoichi Miyasalca, Takemitsu Kunio, Hidenobu Miyamoto, Hideki Gomi, Hiroshi Kitajima

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

A New LSI Performance Prediction Model for Interconnection Analysis of Future LSIs.

Shuji Takahashi, Masato Edahiro, Yoshihiro Hayashi

Proceedings of the ASP-DAC '98, 1998

1990

A multiprocessor system for multiple image recognition-application to automatic routing system.

Gotaro Odawara, Masahiro Tomita, Honghai Jiang, Yutaka Tamiya, Taisei Yoshino, Yoshihiro Hayashi, Satoru Maruyama, Guixin Cheng, Hidetoshi Sakaki

Proceedings of the 10th IAPR International Conference on Pattern Recognition, 1990

An Algorithm for Locating Logic Design Errors.

Masahiro Tomita, Hong-Hai Jiang, Tamotsu Yamamoto, Yoshihiro Hayashi

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1984

The FS-400M Submarine System.

Hiroshi Fukinuki, Takeshi Ito, Mamoru Aiki, Yoshihiro Hayashi

IEEE J. Sel. Areas Commun., 1984