Yoshihiko Horio
Orcid: 0000-0003-0115-3095
According to our database1,
Yoshihiko Horio
authored at least 44 papers
between 1991 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
1995
2000
2005
2010
2015
2020
0
1
2
3
4
5
1
1
1
1
2
1
1
4
1
1
3
3
2
1
2
1
2
4
3
2
1
1
2
1
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
An event-driven mixed analog/digital spiking neural network circuit model for hippocampal spatiotemporal context learning and memory.
Proceedings of the International Joint Conference on Neural Networks, 2024
Analysis of Learning Process of Synaptic Weights in Spatio-temporal Learning Networks for Hardware Implementation.
Proceedings of the International Joint Conference on Neural Networks, 2024
Design of Mixed-Signal LSI with Analog Spiking Neural Network and Digital Inference Circuits for Reservoir Computing.
Proceedings of the International Joint Conference on Neural Networks, 2024
2023
An Extended Spatiotemporal Contextual Learning and Memory Network Model for Hardware Implementation.
Proceedings of the International Neural Network Society Workshop on Deep Learning Innovations and Applications, 2023
2022
Secret-Key Exchange Through Synchronization of Randomized Chaotic Oscillators Aided by Logistic Hash Function.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A Fully Analog CMOS Implementation of a Two-variable Spiking Neuron in the Subthreshold Region and its Network Operation.
Proceedings of the International Joint Conference on Neural Networks, 2022
2021
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2021, 2021
Proceedings of the IEEE International 3D Systems Integration Conference, 2021
Implementation of a Chaotic Neural Network Reservoir on a TSV/μBump Stacked 3D Cyclic Neural Network Integrated Circuit.
Proceedings of the IEEE International 3D Systems Integration Conference, 2021
2019
Proceedings of the International Joint Conference on Neural Networks, 2019
Proceedings of the International Joint Conference on Neural Networks, 2019
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2019: Theoretical Neural Computation, 2019
2017
An Improved Parameter Value Optimization Technique for the Reflectionless Transmission-Line Model of the Cochlea.
J. Robotics Netw. Artif. Life, 2017
2012
Int. J. Bifurc. Chaos, 2012
2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
A CMOS nonlinear-map circuit array for threshold-coupled chaotic maps using pulse-modulation approach.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2010
Mutual Information Analyses of Chaotic Neurodynamics Driven by Neuron Selection Methods in Synchronous Exponential Chaotic Tabu Search for Quadratic Assignment Problems.
Proceedings of the Neural Information Processing. Theory and Algorithms, 2010
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2005
A mixed analog/digital chaotic neuro-computer system for quadratic assignment problems.
Neural Networks, 2005
Improved chaotic neuro-computer with output-coding for quadratic assignment problems.
Proceedings of the IEEE International Joint Conference on Neural Networks, 2005
One-dimensional discrete-time dynamical systems circuit using floating-gate MOS peaking current sink/source.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
2004
Switched-Capacitor Large-Scale Chaotic Neuro-Computer Prototype and Chaotic Search Dynamics.
Proceedings of the Knowledge-Based Intelligent Information and Engineering Systems, 2004
Proceedings of the IEEE International Joint Conference on Neural Networks, 2004
Exponential chaotic tabu search hardware for quadratic assignment problems using switched-current chaotic neuron IC.
Proceedings of the IEEE International Joint Conference on Neural Networks, 2004
Mixed analog/digital chaotic neuro-computer prototype: 400-neuron dynamical associative memory.
Proceedings of the IEEE International Joint Conference on Neural Networks, 2004
2003
IEEE Trans. Neural Networks, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the International Joint Conference on Neural Networks, 2003
Proceedings of the International Joint Conference on Neural Networks, 2003
2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
1999
Switched-capacitor multi-internal-state chaotic neuron circuit with unipolar and bipolar output functions.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
1996
IEEE Trans. Speech Audio Process., 1996
1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995
1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
1993
Switched-capacitor Chaotic Neuron for Chaotic Neural Networks.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
1991
Proceedings of the 1991 International Conference on Acoustics, 1991