Yoshifumi Fukushima
According to our database1,
Yoshifumi Fukushima
authored at least 3 papers
between 2000 and 2002.
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Bibliography
2002
0.13-μm 32-Mb/64-Mb embedded DRAM core with high efficient redundancy and enhanced testability.
IEEE J. Solid State Circuits, 2002
2001
IEEE J. Solid State Circuits, 2001
2000
An 8-ns random cycle embedded RAM macro with dual-port interleaved DRAM architecture (D<sup>2</sup>/RAM).
IEEE J. Solid State Circuits, 2000