Yoshiaki Hagiwara

According to our database¹, Yoshiaki Hagiwara authored at least 3 papers between 1989 and 2019.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Awards

IEEE Fellow

IEEE Fellow 2001, "For pioneering work on, and development of, solid-state imagers.".

Timeline

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Article

PhD thesis

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Links

On csauthors.net:

Bibliography

2019

Multichip CMOS Image Sensor Structure for Flash Image Acquisition.

[BibT_eX]

[DOI]

Yoshiaki Hagiwara

Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019

2017

Panel discussions: "Cool chips for the next decade".

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Symposium in Low-Power and High-Speed Chips, 2017

1989

A 25-ns 4-Mbit CMOS SRAM with dynamic bit-line loads.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, October, 1989

Yoshiaki Hagiwara

Awards

IEEE Fellow

Timeline

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Links

On csauthors.net:

Bibliography

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