Yoonseo Choi

Orcid: 0000-0001-6808-2848

According to our database1, Yoonseo Choi authored at least 31 papers between 2002 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Beyond Swipes and Scores: Investigating Practices, Challenges and User-Centered Values in Online Dating Algorithms.
Proc. ACM Hum. Comput. Interact., 2024

A multi-task deep learning framework for forecasting sparse demand of demand responsive transit.
Expert Syst. Appl., 2024

Proxona: Leveraging LLM-Driven Personas to Enhance Creators' Understanding of Their Audience.
CoRR, 2024

Using LLMs to Investigate Correlations of Conversational Follow-up Queries with User Satisfaction.
Proceedings of The First Workshop on Large Language Models for Evaluation in Information Retrieval (LLM4Eval 2024) co-located with 10th International Conference on Online Publishing (SIGIR 2024), 2024

A High Holding Voltage Diode-Triggered SCR for Low-Voltage ESD Application.
Proceedings of the International Conference on Electronics, Information, and Communication, 2024

2023
Designing for AI-Powered Social Computing Systems.
Proceedings of the Computer Supported Cooperative Work and Social Computing, 2023

Creator-friendly Algorithms: Behaviors, Challenges, and Design Opportunities in Algorithmic Platforms.
Proceedings of the 2023 CHI Conference on Human Factors in Computing Systems, 2023

2022
Stylette: Styling the Web with Natural Language.
Proceedings of the CHI '22: CHI Conference on Human Factors in Computing Systems, New Orleans, LA, USA, 29 April 2022, 2022

2021
Winder: Linking Speech and Visual Objects to Support Communication in Asynchronous Collaboration.
Proceedings of the CHI '21: CHI Conference on Human Factors in Computing Systems, 2021

2020
ProtoChat: Supporting the Conversation Design Process with Crowd Feedback.
Proc. ACM Hum. Comput. Interact., 2020

Leveraging the Crowd to Support the Conversation Design Process.
Proceedings of the 2nd Conference on Conversational User Interfaces, 2020

Supporting an Iterative Conversation Design Process.
Proceedings of the Extended Abstracts of the 2020 CHI Conference on Human Factors in Computing Systems, 2020

2014
JTS-based static branch prediction.
Proceedings of the IEEE International Conference on Consumer Electronics, 2014

Nop compression scheme for high speed DSPs based on VLIW architecture.
Proceedings of the IEEE International Conference on Consumer Electronics, 2014

2013
Fast modulo scheduler utilizing patternized routes for coarse-grained reconfigurable architectures.
ACM Trans. Archit. Code Optim., 2013

2012
Adaptive task duplication using on-line bottleneck detection for streaming applications.
Proceedings of the Computing Frontiers Conference, CF'12, 2012

2010
MacroSS: macro-SIMDization of streaming applications.
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010

2009
Stream Compilation for Real-Time Embedded Multicore Systems.
Proceedings of the CGO 2009, 2009

Flextream: Adaptive Compilation of Streaming Applications for Heterogeneous Architectures.
Proceedings of the PACT 2009, 2009

2008
Shared heap management for memory-limited java virtual machines.
ACM Trans. Embed. Comput. Syst., 2008

A parameterized dataflow language extension for embedded streaming systems.
Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008

2006
Optimal register reassignment for register stack overflow minimization.
ACM Trans. Archit. Code Optim., 2006

Memory Access Driven Storage Assignment for Variables in Embedded System Design.
J. Circuits Syst. Comput., 2006

Protected heap sharing for memory-constrained java environments.
Proceedings of the 2006 International Conference on Compilers, 2006

2005
Memory layout techniques for variables utilizing efficient DRAM access modes in embedded system design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

2003
Address assignment in DSP code generation - an integrated approach.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Memory layout techniques for variables utilizing efficient DRAM access modes in embedded system design.
Proceedings of the 40th Design Automation Conference, 2003

2002
Binding Algorithm for Power Optimization Based on Network Flow Method.
J. Circuits Syst. Comput., 2002

Address code optimization using code scheduling for digital signal processors.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

An efficient low-power binding algorithm in high-level synthesis.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Address assignment combined with scheduling in DSP code generation.
Proceedings of the 39th Design Automation Conference, 2002


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