Yongping Fan
Orcid: 0000-0001-5914-2765Affiliations:
- Intel Corporation, Hillsboro, OR, USA
According to our database1,
Yongping Fan
authored at least 12 papers
between 2003 and 2022.
Collaborative distances:
Collaborative distances:
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Bibliography
2022
A Fractional-N Digital LC-PLL Using Coupled Frequency Doubler With Frequency-Tracking Loop for Wireline Applications.
IEEE J. Solid State Circuits, 2022
IEEE J. Solid State Circuits, 2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2021
Auxiliary Feed-Forward Noise Cancellation Techniques for a Generic Type-II Ring Oscillator Phase Locked Loop.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
11.5 A 23.9-to-29.4GHz Digital LC-PLL with a Coupled Frequency Doubler for Wireline Applications in 10nm FinFET.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
A 0.5V-to-0.9V 0.2GHz-to-5GHz Ultra-Low-Power Digitally-Assisted Analog Ring PLL with Less Than 200ns Lock Time in 22nm FinFET CMOS Technology.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
2019
Digital Leakage Compensation for a Low-Power and Low-Jitter 0.5-to-5GHz PLL in 10nm FinFET CMOS Technology.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
2016
19.4 A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2010
A 78mW 11.8Gb/s serial link transceiver with adaptive RX equalization and baud-rate CDR in 32nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2003
On-die termination resistors with analog impedance control for standard CMOS technology.
IEEE J. Solid State Circuits, 2003