Yongho Lee

Orcid: 0000-0002-9181-4186

According to our database1, Yongho Lee authored at least 31 papers between 2007 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2025
A vision-guided adaptive and optimized robotic fabric gripping system for garment manufacturing automation.
Robotics Comput. Integr. Manuf., 2025

2024
Measurement of Empathy in Virtual Reality with Head-Mounted Displays: A Systematic Review.
IEEE Trans. Vis. Comput. Graph., May, 2024

A 28 GHz GaN 6-Bit Phase Shifter MMIC with Continuous Tuning Calibration Technique.
Sensors, February, 2024

A 28 GHz 5-Bit Phase Shifter MMIC with 5.4° RMS Phase Error in GaN HEMT Process.
Proceedings of the International Conference on Electronics, Information, and Communication, 2024

Rethinking Page Table Structure for Fast Address Translation in GPUs: A Fixed-Size Hashed Page Table.
Proceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques, 2024

2023
Development of a Handwriting Drawings Assessment System for Early Parkinson's Disease Identification with Deep Learning Methods.
Proceedings of the Future Data and Security Engineering. Big Data, Security and Privacy, Smart City and Industry 4.0 Applications, 2023

Personalized Stress Detection System Using Physiological Data from Wearable Sensors.
Proceedings of the Future Data and Security Engineering. Big Data, Security and Privacy, Smart City and Industry 4.0 Applications, 2023

A Digital Therapeutics System for the Diagnosis and Management of Depression: Work in Progress.
Proceedings of the Future Data and Security Engineering. Big Data, Security and Privacy, Smart City and Industry 4.0 Applications, 2023

2022
Explanation of HRV Features for Detecting Atrial Fibrillation.
SN Comput. Sci., 2022

A 24 GHz CMOS Direct-Conversion RF Receiver with I/Q Mismatch Calibration for Radar Sensor Applications.
Sensors, 2022

Pinning Page Structure Entries to Last-Level Cache for Fast Address Translation.
IEEE Access, 2022

Proactively Invalidating Dead Blocks to Enable Fast Writes in STT-MRAM Caches.
IEEE Access, 2022

Don't open row: rethinking row buffer policy for improving performance of non-volatile memories.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Synthetic Data Generation System for AI-Based Diabetic Foot Diagnosis.
SN Comput. Sci., 2021

A 28-GHz Switched-Beam Antenna with Integrated Butler Matrix and Switch for 5G Applications.
Sensors, 2021

Bridge Resistance Compensation for Noise Reduction in a Self-Balanced PHMR Sensor.
Sensors, 2021

A CMOS RF Receiver with Improved Resilience to OFDM-Induced Second-Order Intermodulation Distortion for MedRadio Biomedical Devices and Sensors.
Sensors, 2021

Innovative Way of Detecting Atrial Fibrillation Based on HRV Features Using AI-Techniques.
Proceedings of the Future Data and Security Engineering. Big Data, Security and Privacy, Smart City and Industry 4.0 Applications, 2021

2019
A 28GHz Quadrature Up-conversion Transmitter in 65nm CMOS for 5G mmWave Radio.
Proceedings of the 2019 International SoC Design Conference, 2019

A 28GHz Direct Conversion Receiver in 65nm CMOS for 5G mmWave Radio.
Proceedings of the 2019 International SoC Design Conference, 2019

2018
Design of a Low-Power Complex Baseband Filter with Tunable Gain and Bandwidth in 65nm CMOS.
Proceedings of the International SoC Design Conference, 2018

2017
Design of a 400-MHz 1-V 1.4-mW CMOS RF receiver for MICS applications.
Proceedings of the International SoC Design Conference, 2017

Design of a 1-V 3-mW 2.4-GHz fractional-N PLL synthesizer in 65nm CMOS.
Proceedings of the International SoC Design Conference, 2017

Design of a 2.4-GHz 2.2-mW CMOS RF receiver front-end for BLE applications.
Proceedings of the International SoC Design Conference, 2017

2015
Design of sliding-mode control based on fuzzy disturbance observer for minimization of switching gain and chattering.
Soft Comput., 2015

2014
Technology opportunity identification customized to the technological capability of SMEs through two-stage patent analysis.
Scientometrics, 2014

2011
Comprehensive Analysis and Control of Design Parameters for Power Gated Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2011

A fine-grained technique of NBTI-aware voltage scaling and body biasing for standard cell based designs.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Technique for controlling power-mode transition noise in distributed sleep transistor network.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2008
Simultaneous control of power/ground current, wakeup time and transistor overhead in power gated circuits.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

2007
Temperature-Aware Compilation for VLIWProcessors.
Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 2007


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