Yongchan Ban

According to our database1, Yongchan Ban authored at least 11 papers between 2008 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
Standard Cell Layout Regularity and Pin Access Optimization Considering Middle-of-Line.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

2012
Dealing with IC manufacturability in extreme scaling (Embedded tutorial paper).
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

2011
Modeling of Layout Aware Line-Edge Roughness and Poly Optimization for Leakage Minimization.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

Doppler: DPL-aware and OPC-friendly gridless detailed routing with mask density balancing.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Layout aware line-edge roughness modeling and poly optimization for leakage minimization.
Proceedings of the 48th Design Automation Conference, 2011

Flexible 2D layout decomposition framework for spacer-type double pattering lithography.
Proceedings of the 48th Design Automation Conference, 2011

2010
Total sensitivity based dfm optimization of standard library cells.
Proceedings of the 2010 International Symposium on Physical Design, 2010

Compact modeling and robust layout optimization for contacts in deep sub-wavelength lithography.
Proceedings of the 47th Design Automation Conference, 2010

2009
ELIAD: Efficient Lithography Aware Detailed Routing Algorithm With Compact and Macro Post-OPC Printability Prediction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

2008
Double patterning technology friendly detailed routing.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction.
Proceedings of the 45th Design Automation Conference, 2008


  Loading...