Yong-Seo Koo
Orcid: 0009-0004-7961-4642
According to our database1,
Yong-Seo Koo
authored at least 32 papers
between 2007 and 2024.
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Bibliography
2024
Design of high-reliability LDO regulator incorporated with SCR based ESD protection circuit using transient switch structure.
IEICE Electron. Express, 2024
Design of High-Robustness LDO Regulator With Floating SCR Based ESD Protection Circuit Using High Gain Buffer.
IEEE Access, 2024
Development of Diode Triggering SCR-Based ESD Protection Circuit with Improved Trigger Voltage for Low Voltage Application.
Proceedings of the International Conference on Electronics, Information, and Communication, 2024
2023
High-reliability LDO regulator with built-in SCR-based ESD protection circuit designed for effective peak voltage reduction.
IEICE Electron. Express, 2023
Design of LDO Regulator With High Reliability ESD Protection Circuit Using Analog Current Switch Structure for 5-V Applications.
IEEE Access, 2023
Design of Low Drop Out Regulator with High Robustness ESD Protection Circuit Using Current Buffer Structure.
Proceedings of the International Conference on Electronics, Information, and Communication, 2023
2022
Design of capless LDO regulator with low voltage application based ESD protection circuit using SR-latch switch structure.
IEICE Electron. Express, 2022
Design of high-reliability LDO regulator with SCR based ESD protection circuit using body technique and load transient detection.
IEICE Electron. Express, 2022
Study on ESD Protection Device Based on 4H-SiC GGNMOS with Improved Snapback Characteristics.
Proceedings of the International Conference on Electronics, Information, and Communication, 2022
2021
Design of All-Directional ESD Protection circuit with SCR-based I/O and LIGBT-based Power clamp.
Proceedings of the International Conference on Electronics, Information, and Communication, 2021
2019
2-stage ESD protection circuit with high holding voltage and low trigger voltage for high voltage applications.
Proceedings of the International Conference on Electronics, Information, and Communication, 2019
2018
Proceedings of the 2nd European Conference on Electrical Engineering and Computer Science, 2018
2015
Proceedings of the 38th International Conference on Telecommunications and Signal Processing, 2015
2013
IEICE Electron. Express, 2013
Erratum: Design of high-reliability LDO with current limiting characteristics with built-in new high tolerance ESD protection circuit [IEICE Electronics Express Vol 10 (2013) No 20 pp 20130516].
IEICE Electron. Express, 2013
Design of high-reliability LDO with current limiting characteristics with built-in new high tolerance ESD protection circuit.
IEICE Electron. Express, 2013
Implementation of Improved Census Transform Stereo Matching on a Multicore Processor.
Proceedings of the Multimedia and Ubiquitous Engineering, 2013
Proceedings of Eurocon 2013, 2013
2012
IEICE Electron. Express, 2012
IEICE Electron. Express, 2012
Proceedings of the International SoC Design Conference, 2012
2011
IEICE Electron. Express, 2011
Electrical characteristics and thermal reliability of BJT-inserted GSTNMOS using the 65nm CMOS process.
IEICE Electron. Express, 2011
Analysis of the electrical characteristics of SCR-based ESD Protection Device (PTSCR) in 0.13/0.18/0.35um process technology.
IEICE Electron. Express, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2009
Design of SCR-based ESD protection device for power clamp using deep-submicron CMOS technology.
Microelectron. J., 2009
Design of SCR-Based ESD Protection Device for Power Clamp Using Deep-Submicron CMOS Technology.
IEICE Trans. Electron., 2009
ESD protection circuit with low triggering voltage and fast turn-on using substrate-triggered technique.
IEICE Electron. Express, 2009
Proceedings of the First International Conference on Advances in Multimedia, 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
IEICE Electron. Express, 2008
2007
Analysis of the electrical characteristics of power LDMOSFETs having different design parameters under various temperature.
Microelectron. J., 2007