Yong-Jae Shin
According to our database1,
Yong-Jae Shin
authored at least 4 papers
between 2008 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
13.6 A 16Gb 37Gb/s GDDR7 DRAM with PAM3-Optimized TRX Equalization and ZQ Calibration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2017
The effects of ubiquitous healthcare service on the south Korean Economy: using input-output analysis.
Inf. Syst. Frontiers, 2017
2011
A 40nm 2Gb 7Gb/s/pin GDDR5 SDRAM with a programmable DQ ordering crosstalk equalizer and adjustable clock-tracking BW.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2008
A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008