Yoichiro Ueno

According to our database1, Yoichiro Ueno authored at least 7 papers between 1994 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Next Generation Connectionless IP router architecture with Switching Delay for URLLC Services.
Proceedings of the 24th IEEE International Conference on High Performance Switching and Routing, 2023

2017
Autonomous and distributed internet security (AIS) infrastructure for safe internet.
Proceedings of the 8th International Conference on the Network of the Future, 2017

2009
Disaster recovery mechanism using widely distributed networking and secure metadata handling technology.
Proceedings of the 4th Workshop on the Use of P2P, 2009

2001
Performance Evaluation of Cascade ALU Architecture for Asynchronous Super-Scalar Processors.
Proceedings of the 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 2001

1998
TITAC-2: An Asynchronous 32-bit Microprocessor.
Proceedings of the ASP-DAC '98, 1998

1997
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1994
TITAC: Design of A Quasi-Delay-Insensitive Microprocessor.
IEEE Des. Test Comput., 1994


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