Yoichi Kuramitsu

According to our database, Yoichi Kuramitsu authored at least 3 papers in 1989.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1989

A 209 K-transistor ECL gate array with RAM.

Hisayasu Sato, Takashi Nishimura, Makoto Tatsuki, Atsushi Ohba, Shiro Hine, Yoichi Kuramitsu

IEEE J. Solid State Circuits, October, 1989

Design for reducing alpha-particle-induced soft errors in ECL logic circuitry.

Masatomi Okabe, Makoto Tatsuki, Yutaka Arima, Tadashi Hirao, Yoichi Kuramitsu

IEEE J. Solid State Circuits, October, 1989

A 400 K-transistor CMOS sea-of-gates array with continuous track allocation.

Masatomi Okabe, Yoshihiro Okuno, Takahiko Arakawa, Ichiro Tomioka, Takio Ohno, Tomoyoshi Noda, Masahiro Hatanaka, Yoichi Kuramitsu

IEEE J. Solid State Circuits, October, 1989