Yoetsu Nakazawa

According to our database, Yoetsu Nakazawa authored at least 6 papers between 1997 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

A Circuit for Determining the Optimal Supply Voltage to Minimize Energy Consumption in LSI Circuit Operations.

Yoshifumi Ikenaga, Masahiro Nomura, Yoetsu Nakazawa, Yasuhiko Hagihara

IEEE J. Solid State Circuits, 2008

2006

A read-static-noise-margin-free SRAM cell for low-VDD and high-speed applications.

Koichi Takeda, Yasuhiko Hagihara, Yoshiharu Aimoto, Masahiro Nomura, Yoetsu Nakazawa, Toshio Ishii, Hiroyuki Kobatake

IEEE J. Solid State Circuits, 2006

Delay and power monitoring schemes for minimizing power consumption by means of supply and threshold voltage control in active and standby modes.

Masahiro Nomura, Yoshifumi Ikenaga, Koichi Takeda, Yoetsu Nakazawa, Yoshiharu Aimoto, Yasuhiko Hagihara

IEEE J. Solid State Circuits, 2006

An Automatic Bi-Directional Bus Repeater Control Scheme Using Dynamic Collaborative Driving Techniques.

Masahiro Nomura, Taku Ohsawa, Koichi Takeda, Yoetsu Nakazawa, Yoshinori Hirota, Yasuhiko Hagihara, Naoki Nishi

IEICE Trans. Electron., 2006

2000

A 20-Gb/s CMOS multichannel transmitter and receiver chip set for ultra-high-resolution digital displays.

Muneo Fukaishi, Kazuyuki Nakamura, Hideki Heiuchi, Yoshinori Hirota, Yoetsu Nakazawa, Hidenori Ikeno, Hiroshi Hayama, Michio Yotsuyanagi

IEEE J. Solid State Circuits, 2000

1997

A 1.5-W single-chip MPEG-2 MP@ML video encoder with low power motion estimation and clocking.

Masayuki Mizuno, Yasushi Ooi, Naoya Hayashi, Junichi Goto, Masatoshi Hozumi, Koichiro Furuta, Atsufumi Shibayama, Yoetsu Nakazawa, Osamu Ohnishi, Shu-Yu Zhu, Yutaka Yokoyama, Yoichi Katayama, Hideto Takano, Noriyuki Miki, Yuzo Senda, Ichiro Tamitani, Masakazu Yamashina

IEEE J. Solid State Circuits, 1997