Yizheng Ye

According to our database, Yizheng Ye authored at least 33 papers between 1998 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Test Pattern Generation Based on Multi-TRC Scan Architecture for Reducing Test Cost.

Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu, Bei Cao

J. Low Power Electron., 2012

2011

Optimization of Test Power and Data Volume in BIST Scheme Based on Scan Slice Overlapping.

Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu

J. Electron. Test., 2011

2010

Exact BER Analysis of Differential Chaos Shift Keying Communication System in Fading Channels.

Zhibo Zhou, Jinxiang Wang, Yizheng Ye

Wirel. Pers. Commun., 2010

A test set embedding approach based on twisted-ring counter with few seeds.

Bin Zhou, Yizheng Ye, Zhao-lin Li, Jianwei Zhang, Xin-chun Wu, Rui Ke

Integr., 2010

2009

A new low power test pattern generator using a variable-length ring counter.

Bin Zhou, Yizheng Ye, Zhao-lin Li, Xin-chun Wu, Rui Ke

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Reduction of Test Power and Data Volume in BIST Scheme based on Scan Slice Overlapping.

Bin Zhou, Yizheng Ye, Xin-chun Wu, Zhao-lin Li

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Self-timed Charge Recycling Search-line Drivers in Content-addressable Memories.

Jianwei Zhang, Yizheng Ye, Bin-Da Liu, Feng Guan

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

A Current-Recycling Technique for Shadow-Match-Line Sensing in Content-Addressable Memories.

Jianwei Zhang, Yizheng Ye, Bin-Da Liu

IEEE Trans. Very Large Scale Integr. Syst., 2008

A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends.

Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye

IEEE Trans. Circuits Syst. II Express Briefs, 2008

Delay and Energy Efficient Design of On-Chip Encoded Bus with Repeaters.

Qingli Zhang, Jinxiang Wang, Yizheng Ye

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

2007

Simultaneous reduction in test data volume and test time for TRC-reseeding.

Bin Zhou, Yizheng Ye, Yongsheng Wang

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

2006

A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor.

Tong Zhou, Mingyan Yu, Yizheng Ye

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

A new mismatch-dependent low power technique with shadow match-line voltage-detecting scheme for CAMs.

Jianwei Zhang, Yizheng Ye, Bin-Da Liu

Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

Dependency driven partitioning objects generation for hardware/software partitioning.

Shengtian Sang, Xiaoming Li, Yizheng Ye

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Post linearization of CMOS LNA using double cascade FETs.

Guochi Huang, Tae-Sung Kim, Byung-Sung Kim, Mingyan Yu, Yizheng Ye

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A CMOS bandpass filter with wide-tuning range for wireless applications.

Zhiqiang Gao, Mingyan Yu, Yizheng Ye, Jianguo Ma

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

An energy-efficient temporal encoding circuit technique for on-chip high performance buses.

Qingli Zhang, Jinxiang Wang, Yizheng Ye

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator.

Tong Zhou, Zhibo Zhou, Mingyan Yu, Yizheng Ye

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

A Low-Power Technique Based on Charge Injection and Current-Saving Methods for Match-Line Sensing in Content-Addressable Memories.

Jianwei Zhang, Yizheng Ye, Bin-Da Liu

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses.

Qingli Zhang, Jinxiang Wang, Yizheng Ye

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

A CMOS RF tuning wide-band bandpass filter for wireless applications.

Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

The improvement for transaction level verification functional coverage.

Zhonghai Wang, Yizheng Ye

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Large tuning band range of high frequency filter for wireless applications.

Zhiqiang Gao, Jianguo Ma, Yizheng Ye, Mingyan Yu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Optimal Schemes for ADC BIST Based on Histogram.

Yongsheng Wang, Jinxiang Wang, Fengchang Lai, Yizheng Ye

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2003

A Test Architecture for System-on-a-Chip.

Yongsheng Wang, Liyi Xiao, Mingyan Yu, Jinxiang Wang, Yizheng Ye

Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003

2002

A New Synchronization Algorithm for VHDL-AMS Simulation.

Liyi Xiao, Yizheng Ye, Bin Li

J. Comput. Sci. Technol., 2002

Design and Realization of a Low Power Register File Using Energy Model.

Xuemei Zhao, Yizheng Ye

Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

Design and implementation of concatenated decoder.

Yuxin You, Jinxiang Wang, Mingyan Yu, Yizheng Ye

Proceedings of the Third International Workshop on Digital and Computational Video, 2002

2001

A mixed-signal simulator for VHDL-AMS.

Liyi Xiao, Bin Li, Yizheng Ye, Guoyong Huang, JinJun Guo, Peng Zhang

Proceedings of ASP-DAC 2001, 2001

CLUGGS and CLUCR-Two Matrix Solution Methods for General Circuit Simulation.

Bin Li, Liyi Xiao, Yizheng Ye, Guoyong Huang

Proceedings of the Proceedings 34th Annual Simulation Symposium (SS 2001), 2001

2000

Implementation of Java Card Virtual Machine.

Liu Songyan, Zhigang Mao, Yizheng Ye

J. Comput. Sci. Technol., 2000

1999

A New Algorithm for Retiming-Based Partial Scan.

Zulan Huang, Yizheng Ye, Zhigang Mao

Proceedings of the 8th Asian Test Symposium (ATS '99), 1999

1998

Test Pattern Generation for Column Compression Multiplier.

Pingying Zeng, Zhigang Mao, Yizheng Ye, Yuliang Deng

Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998