Yizhak Shifman

Orcid: 0000-0003-1089-1081

According to our database1, Yizhak Shifman authored at least 12 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
An 11uW, 0.08 mm<sup>2</sup>, 125dB-Dynamic-Range Current-Sensing Dynamic CT Zoom ADC.
IEEE Trans. Circuits Syst. I Regul. Pap., August, 2024

2022
Preselection Methods to Achieve Very Low BER in SRAM-Based PUFs - A Tutorial.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Method for Mitigation of Droop Timing Errors Including a 500 MHz Droop Detector and Dual Mode Logic.
IEEE J. Solid State Circuits, 2022

Mirror<sup>N</sup> PUF: Harvesting Multiple Independent Bits From Each PUF Cell in 65nm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
A 8800 μm² CCO-Based Voltage-Droop and Temperature Detector in 65 nm.
IEEE Access, 2021

2020
An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability.
IEEE Trans. Circuits Syst., 2020

A 2 Bit/Cell Tilting SRAM-Based PUF With a BER of 3.1E-10 and an Energy of 21 FJ/Bit in 65nm.
IEEE Open J. Circuits Syst., 2020

112-Gb/s PAM4 ADC-Based SERDES Receiver With Resonant AFE for Long-Reach Channels.
IEEE J. Solid State Circuits, 2020

A Method to Utilize Mismatch Size to Produce an Additional Stable Bit in a Tilting SRAM-Based PUF.
IEEE Access, 2020

2019
An SRAM PUF with 2 Independent Bits/Cell in 65nm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Highly Reliable SRAM PUF with a Capacitive Preselection Mechanism and pre-ECC BER of 7.4E-10.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

A 1.64mW Differential Super Source-Follower Buffer with 9.7GHz BW and 43dB PSRR for Time-Interleaved ADC Applications in 10nm.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019


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