Yiyu Tan

According to our database1, Yiyu Tan authored at least 22 papers between 2005 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
Asynchronous I/O Optimization for X-Ray Imaging via GPUDirect Storage.
Proceedings of the IEEE International Conference on Cluster Computing, 2024

2023
Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in HPC.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

2022
An Architecture- Independent CGRA Compiler enabling OpenMP Applications.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage.
Proceedings of the International Conference on Field-Programmable Technology, 2022

The Cost of Flexibility: Embedded versus Discrete Routers in CGRAs for HPC.
Proceedings of the IEEE International Conference on Cluster Computing, 2022

2020
White Paper from Workshop on Large-scale Parallel Numerical Computing Technology (LSPANC 2020): HPC and Computer Arithmetic toward Minimal-Precision Computing.
CoRR, 2020

An FPGA-based Sound Field Rendering System.
Proceedings of the IEEE International Conference on Cluster Computing, 2020

2019
Design of an FPGA-Based Matrix Multiplier with Task Parallelism.
Proceedings of the Parallel Computing: Technology Trends, 2019

2018
Performance Evaluation of a Toolkit for Sparse Tensor Decomposition.
Proceedings of the Poster Proceedings of the 27th International Symposium on High-Performance Parallel and Distributed Computing, 2018

2017
An energy-efficient FPGA-based matrix multiplier.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

2009
An instruction folding solution for a Java processor.
Comput. Syst. Sci. Eng., 2009

A Object Model for Java and Its Architectural Support.
Proceedings of the Sixth International Conference on Information Technology: New Generations, 2009

2008
An Extensive Hardware/Software Co-design on a Descriptor-Based Embedded Java Processor.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

2007
An Instruction Folding Solution to a Java Processor.
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2007

Architectural Solution to Object-Oriented Programming.
Proceedings of the Advances in Computer Systems Architecture, 2007

2006
A Java processor with hardware-support object-oriented instructions.
Microprocess. Microsystems, 2006

Architectural Support on Object-Oriented Programming in a JAVA Processor.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005
A Novel JAVA Processor for Embedded Devices.
Proceedings of the Embedded Computer Systems: Architectures, 2005

A Hardware/Software Co-design and Co-verification on a Novel Embedded Object-Oriented Processor.
Proceedings of the Embedded and Ubiquitous Computing, 2005

Hardware Concurrent Garbage Collection for Short-Lived Objects in Mobile Java Devices.
Proceedings of the Embedded and Ubiquitous Computing, 2005

A Novel Just-In-Time Compiler on an Embedded Object-Oriented Processor.
Proceedings of the Fifth International Conference on Computer and Information Technology (CIT 2005), 2005


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