Yiwen Wang

According to our database, Yiwen Wang authored at least 12 papers between 2002 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2010

Application Specific Instruction Set Exploration on VLIW Architectures.

Chengpin Tseng, Chiuyun Hung, De-Sheng Chen, Kuei-Chung Chang, Yiwen Wang

Proceedings of the 2010 International Conference on Embedded Systems & Applications, 2010

2008

Memory Models for an Application-Specific Instruction-set Processor Design Flow.

Jiying Wu, Chijie Lin, Desheng Chen, Yiwen Wang

Proceedings of the International Conference on Embedded Software and Systems, 2008

Performance Improvement using Application-Specific Instructions under Hardware Constraints.

Chijie Lin, Jiying Wu, Jerung Shiu, Chiuyun Hung, De-Sheng Chen, Yiwen Wang

Proceedings of the International Conference on Embedded Software and Systems, 2008

2007

Fixed-outline floorplanning using robust evolutionary search.

De-Sheng Chen, Chang-Tzu Lin, Yiwen Wang, Ching-Hwa Cheng

Eng. Appl. Artif. Intell., 2007

Application-Specific Instruction Generation for SOC Processors.

Shengjyi Yang, Chijie Lin, Chiuyun Hung, Jiying Wu, Yiwen Wang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Noise-Aware Floorplanning for Fast Power Supply Network Design.

Chang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yiwen Wang, Ching-Hwa Cheng

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Modern Floorplanning with Boundary and Fixed-outline Constraints via Genetic Clustering Algorithm.

Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang

J. Circuits Syst. Comput., 2006

2005

Modem floorplanning with abutment and fixed-outline constraints.

Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang, Hsin-Hsien Ho

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

Fast multilevel floorplanning for large scale modules.

Ching-Chung Hu, De-Sheng Chen, Yiwen Wang

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Robust fixed-outline floorplanning through evolutionary search.

Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

Non-slicing floorplans with boundary constraints using generalized polish expression.

De-Sheng Chen, Chang-Tzu Lin, Yiwen Wang

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002

GPE: A New Representation for VLSI Floorplan Problem.

Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002