Yishuang Lin

According to our database, Yishuang Lin authored at least 10 papers between 2020 and 2023.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2023

Performance-driven Wire Sizing for Analog Integrated Circuits.

Yaguang Li, Yishuang Lin, Meghna Madhusudan, Arvind K. Sharma, Sachin S. Sapatnekar, Ramesh Harjani, Jiang Hu

ACM Trans. Design Autom. Electr. Syst., March, 2023

MMM: Machine Learning-Based Macro-Modeling for Linear Analog ICs and ADC/DACs.

Yishuang Lin, Yaguang Li, Meghna Madhusudan, Sachin S. Sapatnekar, Ramesh Harjani, Jiang Hu

Proceedings of the 5th ACM/IEEE Workshop on Machine Learning for CAD, 2023

Fully Automated Machine Learning Model Development for Analog Placement Quality Prediction.

Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Yaguang Li, Yishuang Lin, Jiang Hu, Yiran Chen

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

Are Analytical Techniques Worthwhile for Analog IC Placement?

Yishuang Lin, Yaguang Li, Donghao Fang, Meghna Madhusudan, Sachin S. Sapatnekar, Ramesh Harjani, Jiang Hu

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Mapping Large Scale Finite Element Computing on to Wafer-Scale Engines.

Yishuang Lin, Rongjian Liang, Yaguang Li, Hailiang Hu, Jiang Hu

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

A Circuit Attention Network-Based Actor-Critic Learning Approach to Robust Analog Transistor Sizing.

Yaguang Li, Yishuang Lin, Meghna Madhusudan, Arvind K. Sharma, Sachin S. Sapatnekar, Ramesh Harjani, Jiang Hu

Proceedings of the 3rd ACM/IEEE Workshop on Machine Learning for CAD, 2021

Machine Learning Techniques in Analog Layout Automation.

Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar

Proceedings of the ISPD '21: International Symposium on Physical Design, 2021

2020

Exploring a Machine Learning Approach to Performance Driven Analog IC Placement.

Yaguang Li, Yishuang Lin, Meghna Madhusudan, Arvind K. Sharma, Wenbin Xu, Sachin S. Sapatnekar, Ramesh Harjani, Jiang Hu

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

A Customized Graph Neural Network Model for Guiding Analog IC Placement.

Yaguang Li, Yishuang Lin, Meghna Madhusudan, Arvind K. Sharma, Wenbin Xu, Sachin S. Sapatnekar, Ramesh Harjani, Jiang Hu

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

The ALIGN Open-Source Analog Layout Generator: v1.0 and Beyond (Invited talk).

Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020