Yiorgos I. Bontzios
According to our database1,
Yiorgos I. Bontzios
authored at least 8 papers
between 2010 and 2013.
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Bibliography
2013
Closed-form expressions for the coupling capacitance of metal fill tiles in VLSI circuits.
Microelectron. J., 2013
Exact closed-form expressions for substrate resistance and capacitance extraction in nanoscale VLSI.
Microelectron. J., 2013
2011
A Nondestructive Method for Accurately Extracting Substrate Parameters of Arbitrary Doping Profile in Nanoscale VLSI.
IEEE Trans. Instrum. Meas., 2011
An evolutionary method for efficient computation of mutual capacitance for VLSI circuits based on the method of images.
Simul. Model. Pract. Theory, 2011
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011
Efficient inductance calculation for long and medium length rectangular interconnects in VLSI circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011
2010
A GA-based method for efficient interconnect capacitance computation in mixed-signal integrated circuits using sets of linear charges.
Proceedings of the 17th IEEE International Conference on Electronics, 2010