Yinshui Xia

IEEE Trans. Ind. Electron., 2021

A Sensorless Self-Tuning Resonance System for Piezoelectric Broadband Vibration Energy Harvesting.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2021

An Efficient Piezoelectric Energy Harvesting Circuit With Series-SSHI Rectifier and FNOV-MPPT Control Technique.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2021

TSV Based Orthogonal Coils With High Misalignment Tolerance for Inductive Power Transfer in Biomedical Implants.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2021

BCD Adder Designs Based on Three-Input XOR and Majority Gates.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Defect-Tolerant Mapping of CMOL Circuit Targeting Delay Optimization.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., 2021

An ac-dc Interface Circuit for Harvesting Energy from Multiple Low-Voltage Piezoelectric Inputs.

[BibT_eX]

[DOI]

Jiahuan Wang

Proceedings of the 15th International Symposium on Medical Information and Communication Technology, 2021

Ultra-low-voltage Low-power Self-adaptive Static Pulsed Latch.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on ASIC, 2021

Power optimization with Reinforcement Learning in Logic Synthesis.

[BibT_eX]

[DOI]

Chenghao Yang

Proceedings of the 14th IEEE International Conference on ASIC, 2021

A Cold-Start SECE and BUCK-SECE Hybrid Rectifier for Piezoelectric Energy Harvester.

[BibT_eX]

[DOI]

Hongyu Lu

Proceedings of the 14th IEEE International Conference on ASIC, 2021

2020

Self-Powered Piezoelectric and Thermoelectric Energy Simultaneous Extraction Interface Circuit Based on Double Stack Resonance.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2020

A Fast-Transient Response Digital Low-Dropout Regulator With Dual-Modes Tuning Technique.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst., 2020

Advanced Functional Decomposition Using Majority and Its Applications.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Defective cell reuse based defect-tolerance method for CMOL cell mapping optimization.

[BibT_eX]

[DOI]

Xiaojing Zha

Microelectron. J., 2020

A self-powered PSSHI and SECE hybrid rectifier for piezoelectric energy harvesting.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2020

Hysteresis controlled MPPT for piezoelectric energy harvesting.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2020

A High-Performance Design of Generalized Pipeline Cellular Array.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2020

Defect-Tolerant Mapping of CMOL Circuits with Delay Optimization.

[BibT_eX]

[DOI]

Xiaojing Zha

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

2019

Through-Silicon Via-Based Capacitor and Its Application in LDO Regulator Design.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

Simultaneous Wireless Strain Sensing and Energy Harvesting From Multiple Piezo-Patches for Structural Health Monitoring Applications.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Electron., 2019

ARBSA: Adaptive Range-Based Simulated Annealing for FPGA Placement.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Multi-objective algebraic rewriting in XOR-majority graphs.

[BibT_eX]

[DOI]

Integr., 2019

Exact Synthesis of Boolean Functions in Majority-of-Five Forms.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Structural rewriting in XOR-majority graphs.

[BibT_eX]

[DOI]

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Dual-Source Energy Cooperative Harvesting Circuit with Single Inductor.

[BibT_eX]

[DOI]

Hanze Zheng

Proceedings of the 13th IEEE International Conference on ASIC, 2019

Area Optimization of MPRM Circuits Using Approximate Computing.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018

An Efficient Self-Powered Piezoelectric Energy Harvesting CMOS Interface Circuit Based on Synchronous Charge Extraction Technique.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Stuck-at-close defect propagation and its blocking technique in CMOL cell mapping.

[BibT_eX]

[DOI]

Dingheng Chen

Pierre-Emmanuel Gaillardon

Zhongfeng Wang

Microelectron. J., 2018

Study of silicon core coaxial through silicon via for three dimensional integration.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Functional decomposition using majority.

[BibT_eX]

[DOI]

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

A Transient-Enhanced Digital Low-Dropout Regulator with Bisection Method Tuning.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains.

[BibT_eX]

[DOI]

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

RBSA: Range-based simulated annealing for FPGA placement.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Technology, 2017

Genetic algorithm based on divide-and-conquer strategy for defect-tolerant CMOL mapping.

[BibT_eX]

[DOI]

Xiaojing Zha

Proceedings of the 12th IEEE International Conference on ASIC, 2017

A synchronous charge extraction piezoelectric energy harvesting circuit based on precision active control peak detection with supplement energy.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on ASIC, 2017

Power optimization based on dual-logic using And-Xor-Inverter Graph.

[BibT_eX]

[DOI]

Xuejiao Ma

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016

Stability analysis for coupled multilayer graphene nanoribbon interconnects.

[BibT_eX]

[DOI]

Microelectron. J., 2016

Multi-supply voltage (MSV) driven SoC floorplanning for fast design convergence.

[BibT_eX]

[DOI]

Integr., 2016

Efficient power pad assignment for multi-voltage SoC and its application in floorplanning.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2016

2015

Study on crosstalk characteristic of carbon nanotube through silicon vias for three dimensional integration.

[BibT_eX]

[DOI]

Libo Qian

Guojian Liang

Microelectron. J., 2015

2014

Efficient nonrectangular shaped voltage island aware floorplanning with nonrandomized searching engine.

[BibT_eX]

[DOI]

Microelectron. J., 2014

A Novel Low Power Three-Input OR/XNOR Gate Design.

[BibT_eX]

[DOI]

J. Low Power Electron., 2014

Level shifter planning for timing constrained multi-voltage SoC floorplanning.

[BibT_eX]

[DOI]

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

2013

Low Power State Assignment Algorithm for FSMs Considering Peak Current Optimization.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., 2013

High-Speed Low-Power MCML Nanometer Circuits with Near-Threshold Computing.

[BibT_eX]

[DOI]

Jianping Hu

Haiyan Ni

J. Comput., 2013

Logic Minimization Based on Dual Logic.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Conference on Computer-Aided Design and Computer Graphics, 2013

Voltage Drop Aware Power Pad Assignment and Floorplanning for Multi-voltage SoC Designs.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Conference on Computer-Aided Design and Computer Graphics, 2013

2012

Cell Mapping for Nanohybrid Circuit Architecture Using Genetic Algorithm.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., 2012

2011

Reed-Muller function optimization techniques with onset table.

[BibT_eX]

[DOI]

J. Zhejiang Univ. Sci. C, 2011

2010

A Memetic Approach for Nanoscale Hybrid Circuit Cell Mapping.

[BibT_eX]

[DOI]

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2005

Novel Synthesis and Optimization of Multi-Level Mixed Polarity Reed-Muller Functions.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., 2005

A Novel Multiple-Valued CMOS Flip-Flop Employing Multiple-Valued Clock.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., 2005

Novel synthesis method of mixed polarity Reed-Muller functions.

[BibT_eX]

Proceedings of the Third IASTED International Conference on Circuits, 2005

2003

Power Minimization of FPRM Functions Based on Polarity Conversion.

[BibT_eX]

[DOI]

Xunwei Wu

J. Comput. Sci. Technol., 2003

Area and power optimization of FPRM function based circuits.

[BibT_eX]

[DOI]

B. Ali

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

Design of Ternary Schmitt Triggers Based on Its Sequential Characteristics.

[BibT_eX]

[DOI]

Xunwei Wu

Penjung Wang

Proceedings of the 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), 2002

Best Polarity for Low Power XOR Gate Decomposition.

[BibT_eX]

[DOI]