Yinqi Tang
Orcid: 0000-0001-6667-1833
According to our database1,
Yinqi Tang
authored at least 12 papers
between 2012 and 2022.
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Bibliography
2022
Scalable and Programmable Neural Network Inference Accelerator Based on In-Memory Computing.
IEEE J. Solid State Circuits, 2022
2021
Fully Row/Column-Parallel In-memory Computing SRAM Macro employing Capacitor-based Mixed-signal Computation with 5-b Inputs.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
A Programmable Neural-Network Inference Accelerator Based on Scalable In-Memory Computing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
Reducing Energy of Approximate Feature Extraction in Heterogeneous Architectures for Sensor Inference via Energy-Aware Genetic Programming.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
A Programmable Heterogeneous Microprocessor Based on Bit-Scalable In-Memory Computing.
IEEE J. Solid State Circuits, 2020
2019
Scaling Up In-Memory-Computing Classifiers via Boosted Feature Subsets in Banked Architectures.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Proceedings of the 2019 IEEE Hot Chips 31 Symposium (HCS), 2019
2018
Energy-Efficient Pedestrian Detection System: Exploiting Statistical Error Compensation for Lossy Memory Data Compression.
IEEE Trans. Very Large Scale Integr. Syst., 2018
A Microprocessor implemented in 65nm CMOS with Configurable and Bit-scalable Accelerator for Programmable In-memory Computing.
CoRR, 2018
2013
Proceedings of the 2013 IEEE Wireless Communications and Networking Conference (WCNC), 2013
2012
Proceedings of the 32nd International Conference on Distributed Computing Systems Workshops (ICDCS 2012 Workshops), 2012
Proceedings of the 4th IEEE International Conference on Cloud Computing Technology and Science Proceedings, 2012