Yingke Gao

According to our database, Yingke Gao authored at least 11 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Approximate data mapping in refresh-free DRAM for energy-efficient computing in modern mobile systems.

Sen Li, Hui Jin, Yingke Gao, Ying Wang, Shuhong Dai, Yongjun Xu, Long Cheng

Comput. Commun., 2024

2023

Cross-Layer Patch Alignment and Intra-and-Inter Patch Relations for Knowledge Distillation.

Yi Zhang, Yingke Gao, Haonan Zhang, Xinyu Lei, Longjun Liu

Proceedings of the IEEE International Conference on Image Processing, 2023

Design and Reliability Analysis of Spaceborne Microsystem SiP.

Zheng Yang, Ruohan Zu, Shenglong Li, Yongcong Yang, Yingke Gao

Proceedings of the 6th International Conference on Electronics and Electrical Engineering Technology, 2023

2017

Flip-flop clustering based trace signal selection for post-silicon debug.

Yun Cheng, Huawei Li, Ying Wang, Yingke Gao, Bo Liu, Xiaowei Li

Proceedings of the 35th IEEE VLSI Test Symposium, 2017

2016

Path constraint solving based test generation for observability-enhanced branch coverage.

Yanhong Zhou, Huawei Li, Tiancheng Wang, Bo Liu, Yingke Gao, Xiaowei Li

Proceedings of the 34th IEEE VLSI Test Symposium, 2016

Property Coverage Analysis Based Trustworthiness Verification for Potential Threats from EDA Tools.

Yingxin Qiu, Huawei Li, Tiancheng Wang, Bo Liu, Yingke Gao, Xiaowei Li

Proceedings of the 25th IEEE Asian Test Symposium, 2016

2013

Design of Bitstream Co-processor for Multimedia Applications.

Yingke Gao, Huan Ying, Zhiyuan Xue, Tiejun Zhang, Donghui Wang, Chaohuan Hou

Proceedings of the IEEE 11th International Conference on Dependable, 2013

A design of configurable image enhancement unit.

Zhiyuan Xue, Huan Ying, Yingke Gao, Tiejun Zhang, Donghui Wang, Chaohuan Hou

Proceedings of the IEEE 10th International Conference on ASIC, 2013

Design and implementation of a dynamic loop buffer by reusing the instruction buffer.

Qi Wang, Yingke Gao, Donghui Wang, Tiejun Zhang, Chaohuan Hou

Proceedings of the IEEE 10th International Conference on ASIC, 2013

Design and implementation of transaction level processor based on UVM.

Yingke Gao, Diancheng Wu, Quanquan Li, Tiejun Zhang, Chaohuan Hou

Proceedings of the IEEE 10th International Conference on ASIC, 2013

2011

A test approach of combining partial scan with functional testing for high performance processors.

Quanquan Li, Yingke Gao, Tiejun Zhang, Chaohuan Hou

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011