Ying-Yu Hsu

According to our database, Ying-Yu Hsu authored at least 2 papers between 2014 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

A 7nm 0.46pJ/bit 20Gbps with BER 1E-25 Die-to-Die Link Using Minimum Intrinsic Auto Alignment and Noise-Immunity Encode.

Ying-Yu Hsu, Po-Chun Kuo, Chih-Lun Chuang, Po-Hao Chang, Hung-Hao Shen, Chen-Feng Chiang

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2014

A 1 Tbit/s Bandwidth 1024 b PLL/DLL-Less eDRAM PHY Using 0.3 V 0.105 mW/Gbps Low-Swing IO for CoWoS Application.

Mu-Shan Lin, Chien-Chun Tsai, Chih-Hsien Chang, Wen-Hung Huang, Ying-Yu Hsu, Shu-Chun Yang, Chin-Ming Fu, Mao-Hsuan Chou, Tien-Chien Huang, Ching-Fang Chen, Tze-Chiang Huang, Saman Adham, Min-Jer Wang, William Wu Shen, Ashok Mehta

IEEE J. Solid State Circuits, 2014