Yilong Zhao
Orcid: 0000-0001-8291-6896
According to our database1,
Yilong Zhao
authored at least 32 papers
between 2014 and 2024.
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Bibliography
2024
BlendServe: Optimizing Offline Inference for Auto-regressive Large Models with Resource-aware Batching.
CoRR, 2024
XGrammar: Flexible and Efficient Structured Generation Engine for Large Language Models.
CoRR, 2024
A Large Language Model-based Framework for Semi-Structured Tender Document Retrieval-Augmented Generation.
CoRR, 2024
Proceedings of the 36th International Conference on Software Engineering and Knowledge Engineering, 2024
Proceedings of the Seventh Annual Conference on Machine Learning and Systems, 2024
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024
Proceedings of the Forty-first International Conference on Machine Learning, 2024
Proceedings of the Database Systems for Advanced Applications, 2024
2023
DTATrans: Leveraging Dynamic Token-Based Quantization With Accuracy Compensation Mechanism for Efficient Transformer Architecture.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023
Microless: Cost-Efficient Hybrid Deployment of Microservices on IaaS VMs and Serverless.
Proceedings of the 29th IEEE International Conference on Parallel and Distributed Systems, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
IEEE Trans. Computers, 2022
Vegetation Pattern Formation and Transition Caused by Cross-Diffusion in a Modified Vegetation-Sand Model.
Int. J. Bifurc. Chaos, 2022
Contribution Mechanism and Impact Analysis of AC System at the Diode Natural Commutation and Conduction Stage During Bipolar Short-Circuit Fault for Single-Terminal VSC-Based DC Distribution Networks.
IEEE Access, 2022
DTQAtten: Leveraging Dynamic Token-based Quantization for Efficient Attention Architecture.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-Based Neuromorphic Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network.
CoRR, 2021
Proceedings of the 20th IEEE International Conference on Trust, 2021
SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021
Bit-Transformer: Transforming Bit-level Sparsity into Higher Preformance in ReRAM-based Accelerator.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Re2PIM: A Reconfigurable ReRAM-Based PIM Design for Variable-Sized Vector-Matrix Multiplication.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
Digital Offset for RRAM-based Neuromorphic Computing: A Novel Solution to Conquer Cycle-to-cycle Variation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive Random-Access Memory.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
PIM-Prune: Fine-Grain DCNN Pruning for Crossbar-Based Process-In-Memory Architecture.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
An Ultra-Efficient Memristor-Based DNN Framework with Structured Weight Pruning and Quantization Using ADMM.
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019
2015
J. Vis., 2015
2014