Yih-Long Tseng
According to our database1,
Yih-Long Tseng
authored at least 10 papers
between 2001 and 2006.
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Bibliography
2006
Phase-Adjustable Pipelining ROM-Less Direct Digital Frequency Synthesizer With a 41.66-MHz Output Frequency.
IEEE Trans. Circuits Syst. II Express Briefs, 2006
2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
IEEE Trans. Circuits Syst. II Express Briefs, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
A 13-bit resolution ROM-less direct digital frequency synthesizer based on a trigonometric quadruple angle formula.
IEEE Trans. Very Large Scale Integr. Syst., 2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
A 4-kB 500-MHz 4-T CMOS SRAM using low-V<sub>THN</sub> bitline drivers and high-V<sub>THP</sub> latches.
IEEE Trans. Very Large Scale Integr. Syst., 2004
High-PSR bias circuitry for NTSC sync separation.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
2001
A 1.0 GHz clock generator design with a negative delay using a single-shot locking method.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001