Yih-Hsia Lin

According to our database, Yih-Hsia Lin authored at least 6 papers between 2013 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

VLSI Implementation of RISC-V MCU with a variable stage pipeline.

Mao-Hsu Yen, Cheng-Hao Tsou, Tzu-Feng Lin, Yih-Hsia Lin, Yuan-Fu Ku, Chien-Ting Kao

Proceedings of the 6th IEEE International Conference on Knowledge Innovation and Invention, 2023

FPGA Design of RISC-V MCU Collaborative Industrial Printer Control System.

Mao-Hsu Yen, Tzu-Feng Lin, Cheng-Hao Tsou, Yan-Wei Yu, Yih-Hsia Lin, Yuan-Fu Ku, Chien-Ting Kao

Proceedings of the 6th IEEE International Conference on Knowledge Innovation and Invention, 2023

2022

VLSI Implementation of RISC MCU with In-Circuit Debugger.

Mao-Hsu Yen, Cheng-Hao Tsou, Ssu-Chi Lin, Che-Wei Chang, Yih-Hsia Lin, Yuan-Fu Ku, Chi-Lin Chiang

Proceedings of the 5th IEEE International Conference on Knowledge Innovation and Invention, 2022

FPGA Implementation of ARM MCU with Five-stage Pipeline.

Chi-Lin Chiang, Mao-Hsu Yen, Che-Wei Chang, Yih-Hsia Lin, Yuan-Fu Ku

Proceedings of the 5th IEEE International Conference on Knowledge Innovation and Invention, 2022

2014

VLSI Implementation of 8051 MCU with In-System Programming.

Mao-Hsu Yen, Yeong-Chang Maa, Yih-Hsia Lin, Chih-Chen Lai, Shu-Ping Zheng

Proceedings of the Intelligent Systems and Applications, 2014

2013

Hyper-Universal Switch Network for FPIC Design.

Mao-Hsu Yen, Chu Yu, Yih-Hsia Lin, Chang-Hsien Chung

Proceedings of the Seventh International Conference on Complex, 2013