Yichuan Bai
Orcid: 0000-0001-8895-1780
According to our database1,
Yichuan Bai
authored at least 10 papers
between 2010 and 2024.
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Bibliography
2024
A Compilation Framework for SRAM Computing-in-Memory Systems With Optimized Weight Mapping and Error Correction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2024
Low-Latency PAE: Permutation-Based Address Encryption Hardware Engine for IoT Real-Time Memory Protection.
IEEE Internet Things J., April, 2024
Optoelectronic Computing Evaluation and Deployment Platform Based on a 256-MAC Silicon Photonic Chip.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
An Area-Efficient CNN Accelerator Supporting Global Average Pooling with Arbitrary Shapes.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
2023
Live Demonstration: An Efficient Neural Network Processor with Reduced Data Transmission and On-chip Shortcut Mapping.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
IEEE Trans. Very Large Scale Integr. Syst., 2022
A Reconfigurable Design of Flexible-arbitrated Crossbar Interconnects in Multi-core SoC system.
Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022
2021
LSMQ: A Layer-Wise Sensitivity-Based Mixed-Precision Quantization Method for Bit-Flexible CNN Accelerator.
Proceedings of the 18th International SoC Design Conference, 2021
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2010
TPPADS: An Expert System Based on Multi-branch Structure for Tianjin Planting Pest Assistant Diagnosis.
Proceedings of the Computer and Computing Technologies in Agriculture IV, 2010