Yi-Shen Chen
Orcid: 0000-0002-6896-1057
According to our database1,
Yi-Shen Chen
authored at least 10 papers
between 2016 and 2023.
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Bibliography
2023
DTC: A Drift-Tolerant Coding to Improve the Performance and Energy Efficiency of -Level-Cell Phase-Change Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023
Proceedings of the 12th Non-Volatile Memory Systems and Applications Symposium, 2023
Proceedings of the 20th International SoC Design Conference, 2023
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Drift-tolerant Coding to Enhance the Energy Efficiency of Multi-Level-Cell Phase-Change Memory.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
2021
A Write-friendly Arithmetic Coding Scheme for Achieving Energy-Efficient Non-Volatile Memory Systems.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2019
Performance tuning case study on graphics processing unit-accelerated monte carlo simulations for proton therapy.
Proceedings of the Conference on Research in Adaptive and Convergent Systems, 2019
2016
A Software-Based Redundant Execution Programming Model for Transient Fault Detection and Correction.
Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016