Yi-Chieh Kao

According to our database, Yi-Chieh Kao authored at least 1 paper in 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

An FPGA-Based High-Frequency Trading System for 10 Gigabit Ethernet with a Latency of 433 ns.

Yi-Chieh Kao, Hung-An Chen, Hsi-Pin Ma

Proceedings of the 2022 International Symposium on VLSI Design, Automation and Test, 2022