Yi-Chang Lu
Orcid: 0000-0002-7638-0367
According to our database1,
Yi-Chang Lu
authored at least 69 papers
between 2001 and 2024.
Collaborative distances:
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Bibliography
2024
Deep Plug-and-play Nighttime Non-blind Deblurring with Saturated Pixel Handling Schemes.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024
2022
Low-Light Enhancement Using a Plug-and-Play Retinex Model With Shrinkage Mapping for Illumination Estimation.
IEEE Trans. Image Process., 2022
Bioinform., 2022
A Variation-Based Nighttime Image Dehazing Flow With a Physically Valid Illumination Estimator and a Luminance-Guided Coloring Model.
IEEE Access, 2022
An Alignment-Based Hardware Accelerator for Rapid Prediction of RNA Secondary Structures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Shadow Removal Through Learning-Based Region Matching and Mapping Function Optimization.
Proceedings of the IEEE International Conference on Multimedia and Expo, 2022
Proceedings of the IEEE International Conference on Acoustics, 2022
A Nucleotide-Position-Based Data Format for Fast Variant Calling and Its Hardware Analyzer Design.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
A Hardware Accelerator for Long Sequence Alignment with the Bit-Vector Scoring Scheme and Divide-and-Conquer Traceback.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
2021
Proceedings of the International Conference on Visual Communications and Image Processing, 2021
A Memory-Efficient Accelerator for DNA Sequence Alignment with Two-Piece Affine Gap Tracebacks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Power Reduction of a Set-Associative Instruction Cache Using a Dynamic Early Tag Lookup.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2021
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2021
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021
2020
Hardware Architecture and Implementation of Clustered Tensor Approximation for Multi-Dimensional Visual Data.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020
HDR Deghosting Using Motion-Registration-Free Fusion in the Luminance Gradient Domain.
Proceedings of the 2020 IEEE International Conference on Visual Communications and Image Processing, 2020
An Image Deblurring Processor for Chromatic Aberration Based on the Primal-Dual Algorithm with Cross-Channel Prior.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Comprehensive Study of Keywords for Sequence-Based Automatic Annotation of Protein Functions.
Proceedings of the 20th IEEE International Conference on Bioinformatics and Bioengineering, 2020
2019
BLASTP-ACC: Parallel Architecture and Hardware Accelerator Design for BLAST-Based Protein Sequence Alignment.
IEEE Trans. Biomed. Circuits Syst., 2019
A Special-Purpose Processor for FFT-Based Digital Refocusing using 4-D Light Field Data.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Colorization of High-Frame-Rate Monochrome Videos Using Synchronized Low-Frame-Rate Color Data.
Proceedings of the Computational Color Imaging - 7th International Workshop, 2019
Hardware Accelerator Design for Dynamic-Programming-Based Protein Sequence Alignment with Affine Gap Tracebacks.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
Banded Pair-HMM Algorithm for DNA Variant Calling and Its Hardware Accelerator Design.
Proceedings of the 19th IEEE International Conference on Bioinformatics and Bioengineering, 2019
2018
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
A Hybrid Flow for Multiple Sequence Alignment with a BLASTn Based Pairwise Alignment Processor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A Memory-Efficient FM-Index Constructor for Next-Generation Sequencing Applications on FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Subpixel-Level-Accurate Algorithm for Removing Double-Layered Reflections from a Single Image.
Proceedings of the 2018 IEEE International Conference on Image Processing, 2018
Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018
Adaptively Banded Smith-Waterman Algorithm for Long Reads and Its Hardware Accelerator.
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018
2017
Proceedings of the 2017 IEEE Conference on Computer Vision and Pattern Recognition, 2017
2016
A special processor design for Nucleotide Basic Local Alignment Search Tool with a new Banded two-hit method.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016
Non-photorealistic rendering from real video sequences with discontinuity reduction using fast video segmentation.
Proceedings of the International SoC Design Conference, 2016
An orthogonal matching pursuit processor for sparse-representation-based light field data compression.
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016
An iterative re-weighted least squares processor design for deblurring parabolic camera images.
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016
Queue-based segmentation algorithm for refining depth maps in light field camera applications.
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016
Mask design for pinhole-array-based hand-held light field cameras with applications in depth estimation.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2016
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
Step shift: A fast image segmentation algorithm and its hardware implementation for next-generation sequencing fluorescence data.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
Thermal/performance characterization of CMPs with 3D-stacked DRAMs under synergistic voltage-frequency control of cores and DRAMs.
Proceedings of the 2015 Conference on research in adaptive and convergent systems, 2015
Power efficient special processor design for burrows-wheeler-transform-based short read sequence alignment.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
A pixel-based depth estimation algorithm and its hardware implementation for 4-D light field data.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the 2014 International Conference on 3D Imaging, 2014
2013
LineDiff Entropy: Lossless Layout Data Compression Scheme for Maskless Lithography Systems.
IEEE Signal Process. Lett., 2013
Thermal coupling aware task migration using neighboring core search for many-core systems.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013
Analysis and implementation of Discrete Wavelet Transform for compressing four-dimensional light field data.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Architecture and circuit design of parallel processing elements for de novo sequence assembly.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Light field data processor design for depth estimation using confidence-assisted disparities.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Exploring synergistic DVFS control of cores and DRAMs for thermal efficiency in CMPs with 3D-stacked DRAMs.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Parallel architecture and hardware implementation of pre-processor and post-processor for sequence assembly.
Proceedings of the IEEE International Conference on Acoustics, 2013
Proceedings of the 22nd Asian Test Symposium, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
2010
Proceedings of the International Conference on Image Processing, 2010
Proceedings of the IEEE International Conference on Acoustics, 2010
A new method to improve accuracy of parasitics extraction considering sub-wavelength lithography effects.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2009
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
2008
An Asynchronous Circuit Design with Fast Forwarding Technique at Advanced Technology Node.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
A new method to improve accuracy of leakage current estimation for transistors with non-rectangular gates due to sub-wavelength lithography effects.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
2007
A Built-in Technique for Measuring Substrate and Power-Supply Digital Switching Noise Using PMOS-Based Differential Sensors and a Waveform Sampler in System-on-Chip Applications.
IEEE Trans. Instrum. Meas., 2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
2006
Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006
2004
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004
2001
Proceedings of the 38th Design Automation Conference, 2001
A fast analytical technique for estimating the bounds of on-chip clock wire inductance.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001