Yevgeny Perelman

According to our database, Yevgeny Perelman authored at least 7 papers between 2001 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A 116-Gb/s PAM4 0.9-pJ/b Transmitter With Eight-Tap FFE in 5-nm FinFET.

Yevgeny Perelman, Zeev Toroker, Daljeet Kumar, Eran Maday, Noam Familia, Tzachi Carbone, Gal Kidron, Idan Mizrahi, Yoni Landau, Rushdy Saba, Yaakov Goldberg, Alon Meisler

IEEE J. Solid State Circuits, July, 2024

2020

112-Gb/s PAM4 ADC-Based SERDES Receiver With Resonant AFE for Long-Reach Channels.

Yoel Krupnik, Yevgeny Perelman, Itamar Levin, Yosi Sanhedrai, Roee Eitan, Ahmad Khairi, Yizhak Shifman, Yoni Landau, Udi Virobnik, Noam Dolev, Alon Meisler, Ariel Cohen

IEEE J. Solid State Circuits, 2020

2019

112 Gb/s PAM4 ADC Based SERDES Receiver for Long-Reach Channels in 10nm Process.

Yoel Krupnik, Yevgeny Perelman, Itamar Levin, Yosi Sanhedrai, Roee Eitan, Ahmad Khairi, Yoni Landau, Udi Virobnik, Noam Dolev, Alon Meisler, Ariel Cohen

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2007

An Integrated System for Multichannel Neuronal Recording With Spike/LFP Separation, Integrated A/D Conversion and Threshold Detection.

Yevgeny Perelman, Ran Ginosar

IEEE Trans. Biomed. Eng., 2007

High Rate Wave-pipelined Asynchronous On-chip Bit-serial Data Link.

Rostislav (Reuven) Dobkin, Yevgeny Perelman, Tuvia Liran, Ran Ginosar, Avinoam Kolodny

Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007

2006

A low-power inverted ladder D/a converter.

Yevgeny Perelman, Ran Ginosar

IEEE Trans. Circuits Syst. II Express Briefs, 2006

2001

A low-light-level sensor for medical diagnostic applications.

Yevgeny Perelman, Ran Ginosar

IEEE J. Solid State Circuits, 2001