Yeshwanth Sunnapu

According to our database1, Yeshwanth Sunnapu authored at least 1 paper in 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2024
Novel SRAM based Temporary Memory for PVT Variation Tolerant Analog In-Memory Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024


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