Yeonggeun Song

According to our database, Yeonggeun Song authored at least 5 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A 0.99-pJ/b 10-Gb/s Receiver With Fast Recovery From Sleep Mode Under Voltage Drift.

Kwang-Hoon Lee, Jung-Hun Park, Yongjae Lee, Yeonggeun Song, Seungha Roh, Minkyo Shim, Yoonho Song, Woosong Jung, Young-Ha Hwang, Jonghyun Oh, Woo-Seok Choi, Deog-Kyoon Jeong

IEEE Trans. Circuits Syst. II Express Briefs, November, 2023

A 0.991JS FFT-Based Fast-Locking, 0.82GHz-to-4.lGHz DPLL-Based lnput-Jitter-Filtering Clock Driver with Wide-Range Mode-Switching 8-Shaped LC Oscillator for DRAM Interfaces.

Woosong Jung, Hyojun Kim, Yeonggeun Song, Kwang-Hoon Lee, Deog-Kyoon Jeong

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022

A 1.05-to-3.2 GHz All-Digital PLL for DDR5 Registering Clock Driver With a Self-Biased Supply-Noise-Compensating Ring DCO.

Yeonggeun Song, Han-Gon Ko, Changhyun Kim, Deog-Kyoon Jeong

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A -247.1 dB FoM, -77.9dBc Reference Spur Ring-Oscillator-Based Injection-Locked Clock Multiplier with Multi-Phase-Based Calibration.

Yeonggeun Song, Kyoungjoon Ha, Han-Gon Ko, Min-Seong Choo, Deog-Kyoon Jeong

Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2019

A 15-GHz, 17.8-mW, 213-fs Injection-Locked PLL With Maximized Injection Strength Using Adjustment of Phase Domain Response.

Min-Seong Choo, Yeonggeun Song, Sung-Yong Cho, Han-Gon Ko, Kwanseo Park, Deog-Kyoon Jeong

IEEE Trans. Circuits Syst. II Express Briefs, 2019