Yendo Hu
Orcid: 0000-0002-1638-9642
According to our database1,
Yendo Hu
authored at least 10 papers
between 1995 and 2022.
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Collaborative distances:
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2022
Design and Implementation of Neural Network Accelerated SOC Based on Small RISC-V Processor.
Proceedings of the 2022 6th International Conference on Electronic Information Technology and Computer Engineering, 2022
2021
Wirel. Commun. Mob. Comput., 2021
Proceedings of the EITCE 2021: 5th International Conference on Electronic Information Technology and Computer Engineering, Xiamen, China, October 22, 2021
A Pipelined Multi-Tiered Hardware Acceleration Approach Towards Content Addressable Binary Arithmetic.
Proceedings of the EITCE 2021: 5th International Conference on Electronic Information Technology and Computer Engineering, Xiamen, China, October 22, 2021
Proceedings of the EITCE 2021: 5th International Conference on Electronic Information Technology and Computer Engineering, Xiamen, China, October 22, 2021
Proceedings of the EITCE 2021: 5th International Conference on Electronic Information Technology and Computer Engineering, Xiamen, China, October 22, 2021
Proceedings of the EITCE 2021: 5th International Conference on Electronic Information Technology and Computer Engineering, Xiamen, China, October 22, 2021
Proceedings of the EITCE 2021: 5th International Conference on Electronic Information Technology and Computer Engineering, Xiamen, China, October 22, 2021
1996
Proceedings of International Conference on Neural Networks (ICNN'96), 1996
1995
An implementation efficient learning algorithm for adaptive control using associative content addressable memory.
IEEE Trans. Syst. Man Cybern., 1995