Yen-Tai Lai
According to our database1,
Yen-Tai Lai
authored at least 31 papers
between 1984 and 2016.
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Bibliography
2016
Fast coding unit decision and mode selection for intra-frame coding in high-efficiency video coding.
IET Image Process., 2016
2014
Design of a 1-GSample/s 9-b double sampling track-and-hold amplifier in BiCMOS technology.
Int. J. Circuit Theory Appl., 2014
2013
ACM Trans. Embed. Comput. Syst., 2013
J. Circuits Syst. Comput., 2013
Improved Time-Multiplexed FPGA Architecture and Algorithm for Minimizing Communication Cost Designs.
J. Circuits Syst. Comput., 2013
2012
Proceedings of the 7th International Conference on Communications and Networking in China, 2012
2011
A Performance-Oriented Algorithm with Consideration on Communication Cost for Dynamically Reconfigurable FPGA Partitioning.
ACM Trans. Reconfigurable Technol. Syst., 2011
Int. J. Circuit Theory Appl., 2011
2010
J. Inf. Sci. Eng., 2010
Int. J. Imaging Syst. Technol., 2010
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
ACM Trans. Design Autom. Electr. Syst., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
2002
Proceedings of the American Control Conference, 2002
2001
Graph-theory-based simplex algorithm for VLSI layout spacingproblems with multiple variable constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
A routability and performance driven technology mapping algorithm for LUT based FPGA designs.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1997
IEEE Trans. Very Large Scale Integr. Syst., 1997
1995
1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
1993
Layout Compaction with Minimzed Delay Bound on Timing Critical Paths.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
A graph-based simplex algorithm for minimizing the layout size and the delay on timing critical paths.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993
1990
1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
1984
Proceedings of the 21st Design Automation Conference, 1984