Yen-Hsueh Wu

According to our database, Yen-Hsueh Wu authored at least 3 papers between 2008 and 2010.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2010

A 5-Gb/s Inductorless CMOS Adaptive Equalizer for PCI Express Generation II Applications.

Kuo-Hsing Cheng, Yu-Chang Tsai, Yen-Hsueh Wu, Ying-Fu Lin

IEEE Trans. Circuits Syst. II Express Briefs, 2010

A CMOS adaptive equalizer using low-voltage zero generators technique.

Yu-Chang Tsai, Kuo-Hsing Cheng, Yen-Hsueh Wu, Ying-Fu Lin

Proceedings of the 36th European Solid-State Circuits Conference, 2010

2008

A low jitter self-calibration PLL for 10Gbps SoC transmission links application.

Kuo-Hsing Cheng, Yu-Chang Tsai, Kai-Wei Hong, Yen-Hsueh Wu

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008