Yen-Hsiang Lo

According to our database¹, Yen-Hsiang Lo authored at least 2 papers between 2015 and 2017.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

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Bibliography

2017

Impact of gate-to-source/drain misalignments on source-side injection Schottky barrier charge-trapping memory cells evaluated using numerical programming-trapping iterations.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2017

2015

Robust ESD self-protected LDNMOSFET by an enhanced displacement-current triggering.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Yen-Hsiang Lo

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Bibliography

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