Yehuda Rudin

Orcid: 0000-0002-8745-2688

According to our database1, Yehuda Rudin authored at least 6 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
HAMSA-DI: A Low-Power Dual-Issue RISC-V Core Targeting Energy-Efficient Embedded Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

Basecalling by Statistical Profiling and Hardware-Accelerated Convolutional Neural Network.
Proceedings of the 19th Conference on Ph.D Research in Microelectronics and Electronics, 2024

2022
A RISC-V-based Research Platform for Rapid Design Cycle.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2019
FPGA Implementation of pAsynch Design Paradigm.
Proceedings of the 10th IFIP International Conference on New Technologies, 2019

2018
Embedded randomness and data dependencies design paradigm: Advantages and challenges.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017


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