Yeh-Jen Huang

According to our database, Yeh-Jen Huang authored at least 4 papers between 2008 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Incorporation of a Simple ESD Circuit in a 650V E-Mode GaN HEMT for All-Terminal ESD Protection.

Jian-Hsing Lee, Yeh-Jen Huang, Li-Yang Hong, Li-Fan Chen, Yeh-Ning Jou, Shin-Cheng Lin, Walter Wohlmuth, Chih-Cherng Liao, Ching-Ho Li, Shoa-Chang Huang, Ke-Horng Chen

Proceedings of the IEEE International Reliability Physics Symposium, 2022

2015

Impact of guard ring layout on the stacked low-voltage PMOS for high-voltage ESD protection.

Seian-Feng Liao, Kai-Neng Tang, Ming-Dou Ker, Jia-Rong Yeh, Hwa-Chyi Chiou, Yeh-Jen Huang, Chun-Chien Tsai, Yeh-Ning Jou, Geeng-Lih Lin

Proceedings of the European Conference on Circuit Theory and Design, 2015

2009

Improvement on ESD Robustness of Lateral DMOS in High-voltage CMOS ICs by Body Current Injection.

Wen-Yi Chen, Ming-Dou Ker, Yeh-Ning Jou, Yeh-Jen Huang, Geeng-Lih Lin

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Measurement on snapback holding voltage of high-voltage LDMOS for latch-up consideration.

Wen-Yi Chen, Ming-Dou Ker, Yeh-Jen Huang, Yeh-Ning Jou, Geeng-Lih Lin

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008