Yee William Li

According to our database1, Yee William Li authored at least 13 papers between 2003 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
13.6 A 2.4GHz WLAN digital polar transmitter with synthesized digital-to-time converter in 14nm trigate/FinFET technology for IoT and wearable applications.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2013
A Digital Fractional-N PLL With a PVT and Mismatch Insensitive TDC Utilizing Equivalent Time Sampling Technique.
IEEE J. Solid State Circuits, 2013

2012
A reconfigurable distributed all-digital clock generator core with SSC and skew correction in 22nm high-k tri-gate LP CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A digital fractional-N PLL with a 3mW 0.004mm<sup>2</sup> 6-bit PVT and mismatch insensitive TDC.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
Smart integrated temperature sensor - mixed-signal circuits and systems in 32-nm and beyond.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2009
A 1.05 V 1.6 mW, 0.45°C 3σ Resolution ΣΔ Based Temperature Sensor With Parasitic Resistance Compensation in 32 nm Digital CMOS Process.
IEEE J. Solid State Circuits, 2009

A 1.05V 1.6mW 0.45°C 3σ-resolution ΔΣ-based temperature sensor with parasitic-resistance compensation in 32nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2006
A Continuous-Time Programmable Digital FIR Filter.
IEEE J. Solid State Circuits, 2006

2005
Continuous-time DSPs, analog/digital computers and other mixed-domain circuits.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

Continuous-Time Digital Signal Processors.
Proceedings of the 11th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2005), 2005

2004
A fully integrated on-chip DC-DC conversion and power management system.
IEEE J. Solid State Circuits, 2004

High-throughput asynchronous datapath with software-controlled voltage scaling.
IEEE J. Solid State Circuits, 2004

2003
Asynchronous Datapath with Software-Controlled On-Chip Adaptive Voltage Scaling for Multirate Signal Processing Application.
Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003


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