Ye Lu
Orcid: 0000-0001-9054-2644Affiliations:
- Fudan University, School of Information Science and Technology, State Key Laboratory of Integrated Chips and Systems, Shanghai, China
- Qualcomm, San Diego, CA, USA (2016-2019)
- Intel Corporation, Hillsboro, OR, USA (2011-2016)
- University of Pennsylvania, Philadelphia, PA, USA (PhD 2011)
According to our database1,
Ye Lu
authored at least 7 papers
between 2022 and 2024.
Collaborative distances:
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Bibliography
2024
Multiagent Based Reinforcement Learning (MA-RL): An Automated Designer for Complex Analog Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024
A Quadrature Digital Power Amplifier With Wide Efficiency Enhancement Coverage and High Dynamic Power Range.
IEEE J. Solid State Circuits, July, 2024
EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
A Combined N/PFET CFET-Based Design and Logic Technology Framework for CMOS Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023
Automated Design of Complex Analog Circuits with Multiagent based Reinforcement Learning.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
A 15-Bit Quadrature Digital Power Amplifier With Transformer-Based Complex-Domain Efficiency Enhancement.
IEEE J. Solid State Circuits, 2022