Yatish Patel

According to our database, Yatish Patel authored at least 10 papers between 2002 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2010

Communication and Control for Quantum Circuits.

Yatish Patel

PhD thesis, 2010

2009

Using adaptive routing to compensate for performance heterogeneity.

Yury Markovsky, Yatish Patel, John Wawrzynek

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

A fault tolerant, area efficient architecture for Shor's factoring algorithm.

Mark Whitney, Nemanja Isailovic, Yatish Patel, John Kubiatowicz

Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

2008

Running a Quantum Circuit at the Speed of Data.

Nemanja Isailovic, Mark Whitney, Yatish Patel, John Kubiatowicz

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

2007

Automated generation of layout and control for quantum circuits.

Mark Whitney, Nemanja Isailovic, Yatish Patel, John Kubiatowicz

Proceedings of the 4th Conference on Computing Frontiers, 2007

2006

Interconnection Networks for Scalable Quantum Computers.

Nemanja Isailovic, Yatish Patel, Mark Whitney, John Kubiatowicz

Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006

2004

Datapath and control for quantum wires.

Nemanja Isailovic, Mark Whitney, Yatish Patel, John Kubiatowicz, Dean Copsey, Frederic T. Chong, Isaac L. Chuang, Mark Oskin

ACM Trans. Archit. Code Optim., 2004

Exploiting Prediction to Reduce Power on Buses.

Victor Wen, Mark Whitney, Yatish Patel, John Kubiatowicz

Proceedings of the 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 2004

2003

Post-placement C-slow retiming for the xilinx virtex FPGA.

Nicholas Weaver, Yury Markovsky, Yatish Patel, John Wawrzynek

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

2002

HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform.

Massimo Baleani, Frank Gennari, Yunjian Jiang, Yatish Patel, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli

Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002