Yasuto Igarashi

According to our database, Yasuto Igarashi authored at least 4 papers between 2011 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

An On-Chip DC-DC Converter and Power Management System Achieving Zero Standby-to-Active Transition Time in MCU.

Toyohiro Shimogawa, Makoto Nonaka, Toma Ogata, Toshiki Kiryu, Yasuto Igarashi, Kosuke Yayama, Masahiro Kitamura, Hiromichi Ishikura, Mitsuru Hiraki, Masao Ito, Takashi Kono

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2012

An on-chip 250 mA 40 nm CMOS digital LDO using dynamic sampling clock frequency scaling with offset-free TDC-based voltage sensor.

Kazuo Otsuga, Masafumi Onouchi, Yasuto Igarashi, Toyohito Ikeya, Sadayuki Morita, Koichiro Ishibashi, Kazumasa Yanagisawa

Proceedings of the IEEE 25th International SOC Conference, 2012

28-nm HKMG GHz digital sensor for detecting dynamic voltage drops in testing for peak power optimization.

Mitsuhiko Igarashi, Kan Takeuchi, Yoshio Takazawa, Yasuto Igarashi, Hiroaki Matsushita

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011

A 1.39-V input fast-transient-response digital LDO composed of low-voltage MOS transistors in 40-nm CMOS process.

Masafumi Onouchi, Kazuo Otsuga, Yasuto Igarashi, Toyohito Ikeya, Sadayuki Morita, Koichiro Ishibashi, Kazumasa Yanagisawa

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011