Yasutaka Nakashiba

According to our database, Yasutaka Nakashiba authored at least 4 papers between 1999 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2005

Device technology for body biasing scheme.

Kiyotaka Imai, Yasushi Yamagata, Sadaaki Masuoka, Naohiko Kimuzuka, Yuri Yasuda, Mitsuhiro Togo, Masahiro Ikeda, Yasutaka Nakashiba

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003

A signal-processing CMOS image sensor using a simple analog operation.

Yoshinori Muramatsu, Susumu Kurosawa, Masayuki Furumiya, Hiroaki Ohkubo, Yasutaka Nakashiba

IEEE J. Solid State Circuits, 2003

1999

A 2D CMOS microfluxgate sensor system for digital detection of weak magnetic fields.

Masayuki Furumiya, Keisuke Hatano, Yasutaka Nakashiba, Ichiro Murakami, Tohru Yamada, Takashi Nakano, Yukiya Kawakami, Toru Kawasaki, Yasuaki Hokari

IEEE J. Solid State Circuits, 1999

A 1/2-in, 1.3 M-pixel progressive-scan CCD image sensor employing 0.25-μm gap single-layer poly-Si electrodes.

Masayuki Furumiya, Keisuke Hatano, Yasutaka Nakashiba, Ichiro Murakami, Tohru Yamada, Takashi Nakano, Yukiya Kawakami, Toru Kawasaki, Yasuaki Hokari

IEEE J. Solid State Circuits, 1999