Yasushi Nakahara

According to our database1, Yasushi Nakahara authored at least 2 papers between 1998 and 2003.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2003
A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC.
IEEE J. Solid State Circuits, 2003

1998
A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate cross-talk preamplifier.
IEEE J. Solid State Circuits, 1998


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