Yasushi Kinoshita

According to our database, Yasushi Kinoshita authored at least 5 papers between 1994 and 1999.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1999

A 2.125-Gb/s BiCMOS fiber channel transmitter for serial data communications.

Muneo Fukaishi, Satoshi Nakamura, Akio Tajima, Yasushi Kinoshita, Yoshihiko Suemura, Hisamitsu Suzuki, Toshiro Itani, Hidenobu Miyamoto, Naoya Henmi, Tohru Yamazaki, Michio Yotsuyanagi

IEEE J. Solid State Circuits, 1999

1997

A 2-V, 1-10 GHz BiCMOS transceiver chip for multimode wireless communications networks.

Mohammad Madihian, Emmanuel Bak, Hiroshi Yoshida, Hiroshi Hirabayashi, Kyotaka Imai, Yasushi Kinoshita, Tohru Yamazaki, Laurent Desclos

IEEE J. Solid State Circuits, 1997

1996

A sub-2.0 V BiCMOS logic circuit with a BiCMOS charge pump.

Hitoshi Okamura, Takao Atsumo, Koichi Takeda, Masahide Takada, Kiyotaka Imai, Yasushi Kinoshita, Tom Yamazaki

IEEE J. Solid State Circuits, 1996

1995

A 1 ns, 1 W, 2.5 V, 32 Kb NTL-CMOS SRAM macro using a memory cell with PMOS access transistors.

Hitoshi Okamura, Hideo Toyoshima, Koichi Takeda, Takashi Oguri, Satoshi Nakamura, Masahide Takada, Kiyotaka Imai, Yasushi Kinoshita, Hiroshi Yoshida, Tom Yamazaki

IEEE J. Solid State Circuits, November, 1995

1994

A 10-b 50 MS/s 500-mW A/D converter using a differential-voltage subconverter.

Takahiro Miki, Hiroyuki Kouno, Toshio Kumamoto, Yasushi Kinoshita, Takayuki Igarashi, Keisuke Okada

IEEE J. Solid State Circuits, April, 1994